Virtual Memory

Posted By on October 25, 2014


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GATE and Gate Descriptor Format
Cache Memory

Because people began running multiple programs on a single computer simultaneously, problems started to arise with programs interfering with each other. The solution to this is to present each program with its own complete memory. Virtual memory provides this. Virtual memory provides a mapping that the processor and operating system control that converts virtual address that are not unique, but are given out to each program into unique physical addresses that are used by the memory system. This translation happens by dividing memory into pages. A page table that exists in memory contains a translation from virtual page numbers to physical page numbers. Since this page table exists in memory and memory performance is a problem, a higher performance means of finding these translations is needed. A translation look-aside buffer (TLB) behaves as a cache for this page table. The processor first looks in the TLB for a translation. If a translation is available it uses that and proceeds to look in the cache. If a translation is not available, the processor signals the operating system to look in the page table for the translation. Once the translation is found, the operating system updates the TLB so that the next time the same translation is requested it will be found in the TLB and be a fast translation.

GATE and Gate Descriptor Format
Cache Memory

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Posted by Akash Kurup

Founder and C.E.O, World4Engineers Educationist and Entrepreneur by passion. Orator and blogger by hobby

Website: http://world4engineers.com