Synchronous counter

Posted By on September 30, 2014

Download PDF
Asynchronous or Ripple Counter
Applications of Counters

Synchronous counters

If the “clock” pulses are applied to all the flip-flops in a counter simultaneously, then such a counter is called as synchronous counter.

2-bit Synchronous up counter

The JA and KA inputs of FF-A are tied to logic 1. So FF-A will work as a toggle flip-flop. The JB and KB inputs are connected to QA.

Logical Diagram

Logic Diagram of Synchronous counter


S.N. Condition Operation
1 Initially let both the FFs be in the reset state QBQA = 00…………….initially
2 After 1st negative clock edge
  • As soon as the first negative clock edge is applied, FF-A will toggle and QA will change from 0 to 1.
  • But at the instant of application of negative clock edge, QA ,JB = KB =0 Hence FF-B will not change its state. So QB will remain 0.

QBQA = 01…………….After the first clock pulse

3 After 2nd negative clock edge
  • On the arrival of second negative clock edge, FF-A toggles again and QA change from 1 to 0.
  • But at this instant QA was 1. So JB = KB=1 and FF-B will toggle. Hence QB changes from 0 to 1.

QBQA = 10…………….After the second clock pulse

4 After 3rd negative clock edge
  • On application of the third falling clock edge, FF-A will toggle from 0 to 1 but there is no change of state for FF-B.

QBQA = 11…………….After the third clock pulse

5 After 4th negative clock edge
  • On application of the next clock pulse, QA will change from 1 to 0 as QB will also change from 1 to 0.

QBQA = 00…………….After the fourth clock pulse

Asynchronous or Ripple Counter
Applications of Counters

Download PDF

Posted by Akash Kurup

Founder and C.E.O, World4Engineers Educationist and Entrepreneur by passion. Orator and blogger by hobby