RISC VS CISC – Comparison

Posted By on October 25, 2014


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Hyper-Threading
80486 Block Diagram
 
CISC
RISC
Emphasis on hardware
Emphasis on software
Includes multi-clock complex instructions
Single-clock, reduced instruction only
Memory-to-memory:
“LOAD” and “STORE” incorporated in
Instructions
Register to register:
“LOAD” and “STORE” are
independent instructions
Small code sizes, high cycles per second
Low cycles per second, large code
Sizes
Transistors used for storing complex
Instructions
Spends more transistors on memory registers
Hyper-Threading
80486 Block Diagram

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Posted by Akash Kurup

Founder and C.E.O, World4Engineers Educationist and Entrepreneur by passion. Orator and blogger by hobby

Website: http://world4engineers.com