LOGICAL INSTRUCTIONS Set

Posted By on September 15, 2014


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Arithematic Instructions set
BRANCH INSTRUCTIONS Set

LOGICAL INSTRUCTIONS

AND : Logical AND
This instruction bit by bit AND’s the source operand that may be an immediate register or a memory location to the destination operand that may be a register or a memory location . The result is stored in the destination operand
Eg.
AND AX,0008H
AND AX, BX

OR : Logical OR
This instruction bit by bit OR’s the source operand that may be an immediate register or a memory location to the destination operand  that may be a register or a memory location. The result is stored in the destination operand.

Eg.
OR AX,0008H
OR AX, BX

NOT : Logical invert
This instruction complements the contents of an operand register or memory location, bit by bit.
Eg.
NOT AX
NOT ]5000H]

XOR : Logical exclusive OR
This instruction bit by bit XOR’s the source operand that may be an immediate register or a memory location to a destination operand. The result is stored in the destination operand.

Eg.
XOR AX,0008H
XOR AX, BX

TEST : Logical compare instructions
The test instruction performs a bit by bit logical AND operation on the two operands. The result of this ANDing operation is not available for further use, but flags are affected.
Eg.
TEST AX,BX
TEST [0500], 06H

SAL/SHL : SAL/SHL destination, count
SAL and SHL are two mnemonics for the same instruction. This instruction shifts each bit in the specified destination to the left and 0 is stored at LSB position. The MSB is shifted into the carry flag. The destination can be a byte or a word .
It can be in a register or in a memory location. The number of shifts is indicated by count.
Eg.
SAL CX, 1
SAL AX, CL

SHR : SHR destination, count
This instruction shifts each bit in the specified destination to the right and 0 is stored at MSB position. The LSB is shifted into the carry flag. The destination can be a byte or a word. It can be in a register or in a memory location. the number of the shifts is indicated by the count.
Eg

SAL CX, 1
MOV CL, 05H
SAL AX, CL

SAR : SAR destination, count
This instruction shifts each bit in the specified destination some number of bit positions to the right. As a bit is shifted out of the MSB position, a copy of the old MSB is put in the MSB position. The LSB will be shifted into the CF.
Eg.

SAR BL, 1
MOV CL, 04H
SAR DX, CL

ROL instruction : ROL destination, count
This instruction rotates all bits in a specified byte or word to the left some number of bit positions. MSB is placed as a new LSB and a new CF.
Eg.

ROL CX, 1
MOV CL, 03H
ROL BL, CL

ROR Instruction : ROR destination, count
This instruction rotates all bits in a specified byte or word to the right some number of bits. LSB is placed as a new MSB and a new CF.

Eg.

ROR CX, 1
MOV CL, 03H
ROR BL, CL

RCL instruction : RCL destination, count
This instruction rotates all the bits in a specified byte or word some number of bits position to the left along with the carry flags. MSB is placed as a new carry and previous carry in place as new LSB.

Eg.

RCL CX, 1
MOV CL, 04H
RCL AL, CL

RCR instruction : RCR destination , count
This instruction rotates all bits in a specified byte or word some number of bit positions to the right along with the carry flag. LSB is placed as a new carry and previous carry is in place as a new MSB.

Eg.

RCR CX, 1
MOV CL, 04H
RCR AL, CL

Arithematic Instructions set
BRANCH INSTRUCTIONS Set

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Posted by Akash Kurup

Founder and C.E.O, World4Engineers Educationist and Entrepreneur by passion. Orator and blogger by hobby

Website: http://world4engineers.com