Interrupt Vector Table (IVT) for Real Mode Exception Handling

Posted By on November 2, 2014

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Interrupts in Real Mode are handled through the Interrupt Vector Table (IVT). The Interrupt Vector Table (IVT) is a list of Interrupt Vectors. There are 256 Interrupts in the IVT.


The IVT is located in the first 1024 bytes of physical memory, from addresses 0x0 through 0x3FF. Each entry inside of the IVT is 4 bytes, in the following format:

  • Byte 0: Offset Low Address of the Interrupt Routine (IR)
  • Byte 1: Offset High Address of the IR
  • Byte 2: Segment Low Address of the IR
  • Byte 3: Segment High Address of the IR

Notice that each entry in the IVT simply contains the address of the IR to call. This allows us to create a simple function anywhere in memory (Our IR). As long as the IVT contains the addresses of our functions, everything will work fine.

Okay, Lets take a look at the IVT. The first few interrupts are reserved, and stay the same.

x86 Interrupt Vector Table (IVT)
Base Address Interrupt Number Description
0x000 0 Divide by 0
0x004 1 Single step (Debugger)
0x008 2 Non Maskable Interrupt (NMI) Pin
0x00C 3 Breakpoint (Debugger)
0x010 4 Overflow
0x014 5 Bounds check
0x018 6 Undefined Operation Code (OPCode) instruction
0x01C 7 No coprocessor
0x020 8 Double Fault
0x024 9 Coprocessor Segment Overrun
0x028 10 Invalid Task State Segment (TSS)
0x02C 11 Segment Not Present
0x030 12 Stack Segment Overrun
0x034 13 General Protection Fault (GPF)
0x038 14 Page Fault
0x03C 15 Unassigned
0x040 16 Coprocessor error
0x044 17 Alignment Check (486+ Only)
0x048 18 Machine Check (Pentium/586+ Only)
0x05C 19-31 Reserved exceptions
0x068 – 0x3FF 32-255 Interrupts free for software use

Not to hard. Each of these interrupts are located at a base address within the IVT.

Architecture of Sun Sparc Microprocessor
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Posted by Akash Kurup

Founder and C.E.O, World4Engineers Educationist and Entrepreneur by passion. Orator and blogger by hobby