Contest Switching

Posted By on November 2, 2014


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Interrupt Vector Table (IVT) for Real Mode Exception Handling
Translation Lookaside Buffer (TLB)

A context switch is a procedure that a computer’s CPU (central processing unit) follows to change from one task (or process) to another while ensuring that the tasks do not conflict. Effective context switching is critical if a computer is to provide user-friendly multitasking.

In a CPU, the term “context” refers to the data in the registers and program counter at a specific moment in time. A register holds the current CPU instruction. A program counter, also known as an instruction address register, is a small amount of fast memory that holds the address of the instruction to be executed immediately after the current one.

A context switch can be performed entirely in hardware (physical media). Older CPUs, such as those in the x86 series, do it that way. However, most modern CPUs perform context switches by means of software (programming). A modern CPU can perform hundreds of context switches per second. Therefore, the user gets the impression that the computer is performing multiple tasks in a parallel fashion, when the CPU actually alternates or rotates between or among the tasks at a high rate of speed.

Interrupt Vector Table (IVT) for Real Mode Exception Handling
Translation Lookaside Buffer (TLB)

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Posted by Akash Kurup

Founder and C.E.O, World4Engineers Educationist and Entrepreneur by passion. Orator and blogger by hobby

Website: http://world4engineers.com